1. Field of the Invention
The present invention relates to a fabrication method of a wiring substrate for mounting a semiconductor element.
2. Description of the Related Art
As one of the techniques for mounting a semiconductor element, there is a TAB (Tape Automated Bonding) technique. FIGS. 1A through 1D show the outline of a wiring substrate forming method which is one conventional example thereof in the order of process. For example, to a polyimide resin layer a (having a thickness of, for example, 75 m) patterned to have a predetermined pattern, a copper layer c (having a thickness of, for example, several to several tens m) is bonded via an adhesive b to from a stacked layer. The copper layer c is patterned. As a result, a film circuit having a wiring film formed therein is prepared. FIG. 1A shows its film circuit.
Subsequently, as shown in FIG. 1B, a nickel film (having a thickness of, for example, 2 m) is first formed by electrolytic plating. Thereafter, a gold plating film (having a thickness of, for example, 1 m) is formed by electrolytic plating. Thereafter, as shown in FIG. 1C, external shape cut processing is conducted to separate the same at every semiconductor device independently. Reference number d denotes a plating film.
After the external shape cut processing, an internal end of each wiring film c is bonded to respective electrodes of a semiconductor element e as shown in FIG. 1D. This bonding becomes Au/Al bonding.
FIGS. 2A through 2C show the outline of a wiring substrate forming method which is another conventional example in the order of process. This conventional example is intended for a wiring substrate for BGA/CSP of wire bonding type, and a bump is formed by using nonelectrolytic plating. First of all, as shown in FIG. 2A, a polyimide resin layer a (having a thickness of, for example, 30 m) with a patterned adhesive b is bonded to a copper layer c (having a thickness of, for example, 18 m) to form a stacked layer. Thereafter, as shown in FIG. 2B, the copper layer c is selectively etched. Then, as shown in FIG. 2C, a nickel film (having a film thickness of 2 m) is then formed on the whole surface by nonelectrolytic plating. Further a golden film (0.5 m) is formed on the nickel film by the nonelectrolytic plating to form a nickel/gold plating film d. Thereafter, a semiconductor element e is subjected to die bonding, wire bonding is carried out, and then resin sealing is performed to form a seal layer i. FIG. 2C shows its state after resin sealing, where d denotes a nickel/gold plating film, e a semiconductor element, g an adhesive, h a wire, and is a sealing resin.
In the conventional method shown in FIG. 1, a golden film is formed by the electrolytic plating at every wiring. This results in a first problem that a lead wiring is needed for the electrolytic plating and the design is troublesome. Secondly, there is a problem that a size reduction thereof is difficult because the lead wiring area is needed. Thirdly, since partial plating is difficult by the electrolytic plating, gold sticks to the whole surface where the wiring is exposed, and the amount of use of gold tends to increase. This results in a problem that the gold film cannot be too thick in order to suppress that tendency. This becomes a factor restraining the improvement of the bonding performance. Fourthly, in the case where a bump is configured by forming a gold film directly on the surface of a copper film serving as a wiring film, for example, a nickel film is required as an underlayer of the gold bump in order to prevent ultrasonic vibration applied at the time of bonding from spreading. This results in a problem that damage tends to occur on the semiconductor device side.
Furthermore, in the conventional method shown in FIG. 2, since the gold film is formed by using the nonelectrolytic plating method, first, the plating speed is slow and the time required for plating becomes very long. Furthermore, in the case where a substrate for TAB is formed, tapelike plating facilities become necessary. This results in a problem that the cost of facilities becomes high. Secondly, the nonelectrolytic plating method has a problem that the gold plating for an opening having a small diameter is difficult and blurring of the adhesive and occurrence of bubbles easily occur. Thirdly, the nonelectrolytic plating method has a problem that the stability of plating is poor, the film quality is unstable, and an abnormality easily occurs in the gold film. Fourthly, the nonelectrolytic plating method has a problem that the replacement frequency of the plating solution is high and replacement is needed at a frequency of once every three or four days.
The present invention has been made to solve such problems. An object of the present invention is to avoid drawbacks of the conventional electrolytic plating method in a fabrication method of a wiring substrate for mounting a semiconductor element by adopting the electrolytic plating method in forming a bump or a bonding pad and thereby eliminating the necessity of forming a lead wiring at every wiring while avoiding the drawbacks of the above described non-electrolytic plating method.
A fabrication method of a wiring substrate for mounting a semiconductor element according to a first aspect of the present invention includes forming a resist film (first resist film) of a negative pattern for forming a wiring film and a resist film (second resist film) of a negative pattern for forming a bump or a pad on a surface of a metal base, conducting electrolytic plating of a bump or pad material by using the first resist film and the second resist film as a mask, thereby forming a bump or a pad, then removing only the second resist film, and forming a wiring film by conducting electrolytic plating with the first resist film serving as a mask.
According to the fabrication method of the wiring substrate for mounting a semiconductor element according to the first aspect, therefore, in a stage before the wiring film is formed, plating is conducted by using the resist film having a negative pattern with respect to the wiring film and the resist film having a negative pattern with respect to the bump or pad as masks, and thereby the bump or pad is formed. At the time of that plating, therefore, the metal base can be used as a potential transmission means. Without providing a lead circuit for electrolytic plating, therefore, the bump or pad can be formed by the electrolytic plating. Therefore, all drawbacks of the method of forming the bump or pad by using the nonelectrolytic plating can be avoided. In addition, the necessity of forming the electrolytic plating lead circuit for providing a potential at every wiring film when using the electrolytic plating method is not present, either. Therefore, the drawback of conventional electrolytic plating method can be avoided.
A fabrication method of a wiring substrate for mounting a semiconductor element according to a second aspect of the present invention includes conducting electrolytic plating of a bump or pad material on a surface of a metal base by using a resist film having a negative pattern with respect to a wiring film to be formed, as a mask, thereby forming a bump or a pad, furthermore conducting electrolytic plating of a wiring film material on the pad on the surface of the metal base by using the resist film as a mask, and thereby forming a wiring film.
According to the fabrication method of a wiring substrate for mounting a semiconductor element according to the second aspect, therefore, the resist film formed as the mask for selectively forming the wiring film is used as the mask for selectively forming the bump or pad as well. Both the formation of the bump or the pad and formation of the wiring film are conducted in such a state that the metal base is surely present. At the a time of that plating, therefore, the metal base can be used as a potential transmission means. Without providing a lead circuit for electrolytic plating, therefore, the bump or the pad can be formed by the electrolytic plating. Therefore, all drawbacks of the method of forming the bump or pad by using the nonelectrolytic plating can be avoided. In addition, the necessity of forming the lead circuit for electrolytic plating for providing a potential at every wiring film when using the electrolytic plating method is not present, either. Therefore, the drawback of conventional electrolytic plating method can be avoided.
In addition, since the resist film serving as the mask for selectively forming the bonding pad is common to the resist film serving as the mask for selectively forming the wiring film, there is also obtained an advantage that a series of processes for selectively forming the resist film can be reduced by one amount.
Other objects and advantages of the invention will become apparent upon reading the following detailed description and appended claims, and upon reference to the accompanying drawings.